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Yingjie Lao

Yingjie LaoAssistant Professor of Electrical and Computer Engineering

Ph.D. - University of Minnesota, Twin Cities
Electrical and Computer Engineering
B.S. - Zhejiang University
Information Science and Engineering

Contact Information
Office: 313B Riggs Hall
Email: ylao@clemson.edu 

Personal home page

Research
Dr. Lao is currently engaged in research in hardware security, architecture and algorithm for signal processing and data mining systems, high-speed/low-power VLSI architectures, IC design, computer-aided design of VLSI circuits, and statistical modeling.

Hardware Security
As electronic devices become increasingly interconnected and pervasive in people's lives, security, trust-worthy computing, and privacy protection have notably emerged as important challenges for the next decade. The assumption that hardware is trustworthy and that security effort only needs to be directed towards networks and software is no longer valid given globalization of integrated circuits (ICs) and systems design and fabrication.  Furthermore, the advent of new attack modes, illegal recycling, and hard-to-detect Trojans make hardware protection an increasingly challenging task. Design of secure hardware ICs requires novel approaches for authentication that are ideally based on multiple layers of protection. Equally important is the need for protecting intellectual property and design of integrated circuits that are harder to reverse engineer. Our research group develops novel solutions for ensuring the security and trustworthiness of integrated circuits and systems.

VLSI Architectures for data mining and signal processing systems
Today, DSP (digital signal processing) is everywhere, which plays a critical role in numerous applications such as video compression, portable systems/computers, multimedia, wired and wireless communications, speech processing, and biomedical signal processing. At the same time, the realm of pattern recognition, machine learning and data mining are undergoing massive transition in application domains. When comes to hardware implementations of these data mining or DSP algorithms, we need to design them carefully and smartly to achieve higher speed or lower power or area. Our group explores the arithmetic redundancies at the architectural level to pursue efficient VLSI architectures for those data mining or signal processing systems. Novel computing paradigms, such as stochastic computing and approximate computing, are also investigated for achieving these goals.